This invention relates to a semiconductor device having a groove isolation structure with high reliability, and a process for producing the same.
As a process for electrically insulating isolation of adjacent elements on a semiconductor substrate, it is known a shallow groove isolation (SGI) process. According to the SGI process, shallow grooves are formed on a silicon substrate, followed by burying an oxide film thereinto by a chemical vapor deposition (CVD) method or a sputtering method. Since the SGI process has higher processing dimensional accuracy than a LOCOS structure conventionally used, it can provides a structure suitable for devices after a 0.25 xcexcm process. But according to the SGI structure, since a burying oxide film is produced by a CVD method or a sputtering method, it has a density generally coarser than a thermally oxidized film (hereinafter referred to as xe2x80x9cthermal oxide filmxe2x80x9d). Thus, about 5% shrinkage takes place during a subsequent thermal treatment step, resulting in formation of a void-like xe2x80x9ccavityxe2x80x9d at the interface of the oxide film even by slight etching using dilute hydrofluoric acid.
FIG. 2 is a cross-sectional view showing such a xe2x80x9ccavityxe2x80x9d, wherein numeral 1 denotes a silicon substrate, numeral 6 a burying insulating film or layer, and numeral 3 the xe2x80x9ccavityxe2x80x9d.
When such a xe2x80x9ccavityxe2x80x9d is present, a wiring film or the like remains in the cavity at the time of patterning after a step of wiring and a deposition of an electrode film, resulting in often causing electrically undesirable phenomena such as short-circuit, etc.
In order to remove such a xe2x80x9ccavityxe2x80x9d, S. Nag et al disclose in Tech. Dig. of IEEE, 1996, p. 841-844 that after burying a burying oxide film, thermal treatment is conducted in an oxidizing atmosphere to change Si in a groove into SiO2 for reducing the volume, resulting in removing the xe2x80x9ccavityxe2x80x9d.
But, according to this method, there arises an disadvantage in that a high mechanical stress is generated in the groove and adjacent silicon substrate portions due to about twice volume expansion of the oxide film as a side action of removal of xe2x80x9ccavityxe2x80x9d.
It is an object of the present invention to provide a semiconductor device having high reliability by making a generated stress lower than a critical stress and preventing generation of crystal defects or an increase of a junction leakage current, and a process for producing the same.
The present invention provides a semiconductor device comprising a semiconductor substrate having a plurality of element formation regions and element isolation regions on a main surface thereof, each element isolation region comprising a groove formed in the semiconductor substrate, a thermal oxide film formed on the wall surface of the groove, and an insulating material buried in the groove, said thermal oxide film being formed while satisfying the formula:
D less than 0.4(xe2x88x92100R+7)xe2x88x921(xe2x88x92230 T+14.5)xe2x80x83xe2x80x83(1)
wherein D is a width of the element formation region (or active width); T is a thermal oxidation amount (thermal oxide film thickness) of the groove in terms of microns; and R is a curvature radius at an end bottom portion of the groove, provided that T is 0.01 xcexcm or more.
The present invention also provides a process for producing a semiconductor device having a plurality of element formation regions and element isolation regions on a main surface of a semiconductor substrate, which comprises the steps of:
(a) forming a pad oxide film and a silicon nitride film on a semiconductor substrate, and removing a part of the semiconductor substrate from the portions wherein the element isolation regions are to be formed to form grooves, each groove having a curvature radius R at an end bottom portion of the groove,
(b) burying an insulating film in each groove to form a burying insulating film,
(c) forming a thermal oxide film on the wall surface of each groove while satisfying the following formula:
D less than 0.4(xe2x88x92100R+7)xe2x88x921(xe2x88x92230 T+14.5)xe2x80x83xe2x80x83(1)
wherein D is a width of the element formation region (or active width); T is a thermal oxidation amount of the groove in terms of microns; and R is a curvature radius at the end bottom portion of the groove, provided that T is 0.01 xcexcm or more, and
(d) removing said burying insulating film, said silicon nitride film and said pad oxide film.